Comparative Analysis of Various Multicarrier Modulation Techniques for Different Multilevel Converters

*Corresponding author Peer review under the responsibility of University of Baghdad. https://doi.org/10.31026/j.eng.2018.12.05 2520-3339 © 2018 University of Baghdad. Production and hosting by Journal of Engineering. ). nc/4.0/ cc http://creativecommons.org/licenses/by NC license This is an open access article under the CC BY Article received: 2/7/2017 Article accepted: 2/7/2018 54 Electrical, Electronics and communications, and Computer Engineering


MULTILEVEL CONVERTER TOPOLOGIES
The MLCs are basically classified into three forms in its structure.
Where:  ′ is the number of the levels of the output voltage per phase leg.
As in this work the 9-level (line voltage converter (L)), has a 5-levels (per phase level converter (L')).
To produce L'-level staircase output phase voltage: Common (L' -1) dc side capacitors are needed, (L' -1) * (L '-2) clamping diodes it should be used, 2 * (L' -1) main switching devices are needed for each phase leg.Thus three of dc side capacitors ( C1, C2, and C3), six of clamping diodes in each phase leg, and six of power switch and its parallel diodes are used in the structure of a 7-level DC-MLC ( L' = 4 ) is shown in Fig. 1-a, Nami, et al., 2008.

Capacitor Clamped Multilevel Converter
This converter is identical to DC-MLC in their structure, excepting of using clamping capacitors in place of clamping diodes as shown in

Modular Structured Multilevel Converter
This type includes a chain of H-Bridge converter modules.

Phase Disposition
All carriers are in phase as appeared in Fig. 3-a.For this method, major harmonic power is focused at the carrier frequency.

Phase Opposition Disposition
All carriers higher than the zero reference value are out of phase with those lower the zero reference value by 180° as shown in Fig. 3-b.

Alternative Phase Opposition Disposition
All the carriers are replacement in position ( i.e. "each carrier is level shifted by 180° from its next carriers" ) as shown in Fig. 3-c.For this technique, the greatest harmonics are sidebands centered on the carrier frequency with negative harmonics occurring directly on the carrier frequency.

Phase Shifted Technique ( Carriers Shifted Horizontally )
Normally, PS-PWM is used with MS-MLCs and CC-MLCs.In this technique ( − 1) 2 ⁄ carriers are used for a  −level converter, all carriers with same magnitude and frequency but phase shifted by 180°/(( − 1) 2) ⁄ .There are two of the opposite reference signals (phase shifted by 180° to each other) are required for the two phase legs of the MLC converter, one for a half leg and the inverted signal for the other half leg as shown in

SIMULATION CIRCUITS
To verify the proposed schemes, a simulation model for nine-level converters is implemented using Matlab/Simulink simulation tool as shown in Fig. 4. MOSFET is chosen as the main power switch for all types of MLCs.Simulation parameters of the proposed MLCs are shown in Table 1.To make a compression between the three circuit diagrams of 9-level MLCs in criteria of complexity, Table 2 lists the summary of the needed number of the power electronic element to implements theses circuits.For all the configurations of MMTs, simulations are done by varying the ( subsystem 1 ) as shown in Fig. 5 which presents a simulation circuit of LS-PDM technique ( PD method ); for implementing the LS-PDM for nine-level MLC, eight carrier signals with the same peak to peak and same switching frequency are required.These eight signals are compared with single reference sine wave to produce eight signals for the first leg of the converters and then are negated to produce the second eight signals for the second leg of the converters.Fig. 6 shows simulation circuit of PS-PDM technique; four of carrier signals are required to implement this technique then a single carrier signal is used and phase shifted three times with 45˚ by using ( three of Transport Delay block ) to produce the another three carrier signals.

SIMULATION RESULTS
The output voltage and its Harmonic Spectrum (HS) with various MMTs of nine-MLC are shown in the Figures below as following : Fig. 7 shows the results of DC-MLC, Fig. 8 shows the results of CC-MLC, and Fig. 9 shows the results of MS-MLC.The PS-PDM technique isn't suitable with DC-MLC, where the THD amplitude is very high therefore it is not implemented in the study .After presenting the output voltage waveforms and its HS of the converters, we make a summary table of the peak amplitude of the fundamental output voltage, and its THD% of nine-level MLCs for every MMT for easily compression among them, as listed in Table 3.
From Table 3 we conclude that the output of MLCs with POD technique ( in each one of three types of MLCs ) has a lower amplitude of THD% as compared with the other techniques of LS-PDM ( PD, and APOD ) and PS-PDM .It is also seen that MS-MLC with MMTs is better since it provides relatively superior fundamental output voltage and minimal output THDV% compared with the others MLCs types.In addition to the MS-MLC requires the minimum number of power electronic components as compared with two other kinds to achieve the same output voltage levels as shown in Table 2 .The alone drawback of MS-MLC, it's demanded separately dc sources, but this drawback can be considered as an advantage as its utilization of a great number of dc sources allows for the converter to generate high voltages and thus high power ratings.

CONCLUSIONS
Nine-level MLC with three types (DC, CC, and MS ) employing different MMTs has been implemented and analyzed.It can be concluded from the results above the following points : -The harmonics in the output voltage waveform was reduced significantly by applying the different configuration of MMTs especially LS-PDM techniques and as a result there is no need to a high necessity filters .-In all topologies of MLCs, the harmonic content is proportionate with the numbers of level of the converter, so it's possible to improvement the harmonic content by increasing the levels of the converter.Output voltage (V)

Fig. 1
-b; circuit diagram of a seven-level ( L' = 4) CC-MLC.To generate L'-level staircase output phase voltage: (L' -1) dc link capacitors are needed.(L' -1) * (L' -2) / 2 clamping capacitors are required for each phase leg (as Ca1, Ca2, and Ca3).Each phase leg of the converter should contains of 2 * (L' -1) main switching devices and its parallel diodes.The major problem of these types of converters is that it requires most number of capacitor comparative to other MLC, causing to arise difficulties of the packaging and huge weight, Thielemans, et al., 2009.

Fig. 3 .
The gate signals are a result of the comparison between carrier wave and reference signal, McGrath, and Holmes, 2012.

Kouro, et al., 2008, Aswini, et al., 2017. 2.1 Diode Clamped Multilevel Converter This
All the topologies have the similar property of dropping the harmonics.MLCs have many attractive features ( Compared with common two level converters) that is: ability of working with high voltage, reduced common mode voltages, lower switching voltage stress, upgrades the output voltage waveform, and smaller or even no output filter is required.The limitation of the MLC is that it required a great amount of semiconductors component, type of converter uses single dc voltage source that is partitioned into a numeral of voltage steps by the chain sequence of capacitors known as "dc side capacitors".The purpose of clamping diodes in the circuit is to avoid the voltage through one of the switching power devices which exceed the voltage across one of the capacitors,

Rane, et al., 2014, and Seyezhai, et al., 2008.
The output voltage of an L-level MLC equivalent to the following equation

et al., 2014. 3.1 Level Shifted Techniques ( Carriers Shifted Vertically )
This type is also called "Carrier Disposition (CD) techniques".For an L-level converter,  − 1 carriers with identical frequency and identical peak to peak amplitude are arranged such that the groups they occupy are adjacent.Unique reference waveform is needed and it is put in the center of the carrier set.The reference is always equated with all of the carrier signals.If the reference is greater than the carrier signal, the active device that corresponds to that carrier is switched on and vice versa, Malathy and Ali, 2012.LS-PDM can be categorized into three groups: Phase Disposition (PD), POD, and Alternative Phase Opposition Disposition (APOD) Reddy, The main concept of this type of converters is to synthesize the required ac output voltage from numerous separate dc input sources, Manimala, et al., 2011.The MS-MLC is well appropriate for renewable energy applications because naturally of offering isolated dc sources: as Photovoltaic (PV), Aswini, et al., 2017, rectified output of Wind turbine generator as in paper of Samue, et al., 2010, Fuel Cell, Seyezhai, et al., 2008, in addition to in some paper a hybrid renewable power sources were used for MLC as a hybrid (PV plus Wind) as in research of Ganesh, et al., 2014.flexibility, and casing is possible because each level reiterated with the same structure.Furthermore, it does not suffer the voltage-unbalancing problem as experienced by the DC-MLC (its average) and in CC-MLC (it's high).MS-MLC is more convenient than other MLC because it doesn't have any clamping diode and clamping capacitor, Aswini, et al., 2017.3.MULTICARRIER MODULATION TECHNIQUESThe power electronic switches of MLC are mainly controlled with MMTs.MMTs can be divided into two types: LS-Pulse Duration Modulation (PDM) methods, where several carriers are level (Vertically) shifted, and PS-PDM method, where several carriers are phase (Horizontally) shifted accordingly see Fig.3, Calais, et al., 2001, and Venka,

Table 2 .
Major element requirements for 9-level MLC types per phase leg.

Table 3 .
Comparison of Vpeak, and THDV% for various MMTs for three types of MLC.